1. Field of Invention
This invention relates to a semiconductor process, and more particularly relates to an alignment accuracy (AA) mark that can be used to check the alignment accuracies between at least three groups of patterns defined by the same number of exposure steps.
2. Description of Related Art
As the dimensions of semiconductor devices get further smaller, the lithographic pitch resolution of a single exposure step becomes insufficient. A method to meet the resolution requirement is to split patterns of the target wafer layer into two groups each with a larger pitch and define them by two exposure steps respectively.
In order to check the alignment accuracies between the two pattern groups of the current wafer layer and a pre- or post-layer formed before or after the target layer, in the prior art, three AA marks are formed in one AA mark area in the scribe line region of the wafer. Each of the three AA marks include two groups of patterns among the patterns defined together with the first pattern group of the current layer, the patterns defined together with the second pattern group of the current layer, and the patterns defined together with the pre- or post-layer. Hence, the AA mark area takes a large lateral area in the scribe line region, and the alignment accuracy measurement has to be conducted three times for the three AA marks and therefore spends more time.